Friday, April 27, 2007

My 32-bit RISC core impresses me!

This may sound extremely cheesy, but I'm personally impressed by my own handiwork. Haha! I've been working on a 32-bit RISC microprocessor core, on and off, during my free time. The aeMB is a binary compatible clone of the Xilinx Microblaze processor. The core is currently among the Top 10 rated projects and is the #2 microprocessor in the list on OpenCores.

The project started several years ago when I was bumming around, while waiting for my graduation. I had just read the Hennessy & Patterson book and I was dying to try out some of the concepts illustrated in the book. So, I decided to design a RISC microprocessor. There were already open source clones of the SPARC, MIPS and ARM processors. So, I ended up selecting another popular processor instead. It is capable of running Linux and has an available GCC compiler. It's important to have an available GCC compiler as I can use that to compile software instead of having to write my own compiler from scratch.

I've recently made some massive updates to the core. There were several bugs that were discovered and many improvements made. As more people use the core, they end up uncovering bugs that I had not encountered. That's one of the benefits of open source. Some of the other improvements were made not because they were problems, but because other people had enquired about the capabilities. So, I thought that I would just throw it in if it didn't take up too much effort.

The reason that I had continued to work on the core was because some 3rd party had decided to use it in their upcoming product. If no one was using the core, I wouldn't have bothered to continue working on it. I managed to hand optimise the design to squeeze out an additional 50% speed improvement while reducing the resource consumption by about 40%. It currently uses up 34k gates @ 70 MHz on a Spartan3. That's fairly impressive, if I do say so myself.

However, I had never really stressed out the core. So, I can never guarantee the operation of the core. Just this morning, I updated the C test code using some open source numerical (Fibonacci, Euclidean, Newton-Rhapson) algorithms that I had found. The C code is compiled using GCC compiler, which is fairly standard. I had fully expected the tests to fail but they passed without much problem. This totally surprised me as I had never tested the core out as extensively before.

The new tests that I had included stressed the core out in many ways. It includes recursion and iteration, goto, modulo arithmetic, multiplication and division, floating-point arithmetic, type conversion (integer to float) and pointer operation. There really isn't much else that a microprocessor needs to do. With this battery of tests that the core now passes, I'm quite happy to say that it's working surprisingly well.

There is only one other thing to work on with the core, and that is interrupt support. I had originally included some basic interrupt support, but it introduced control hazards into the pipeline that I had not expected. It screwed things up if a branch instruction was already in the pipeline. There is a simple fix that I can implement quickly, but it isn't elegant enough. So, I'm going to think on the solution for a while more.

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