Hybrid 68K microprocessor

My blogging has been a little slow recently. The reason for it is that I've been working on another microprocessor design. This time around, I've chosen to design a 68K compatible microprocessor. However, instead of making a clone, I've made several improvements to it.

I'm calling my new design, the AE68, which is in-line with the names for my other processors. I've always wanted to work on an improved 68K clone. The 68K was my first foray into microprocessor design. I did it at a time when I had little knowledge of hardware design and totally no knowledge of computer architecture. I had to teach myself how to do it from scratch. Needless to say, the product was a monstrosity and only sort-of worked. However, it did bag me the top prize for final year projects as the examiners were suitably impressed with the effort.

Since then, I've always felt that this was one of my failures and I had to fix it. However, I've never quite had the time to work on it fully. Unlike my other designs, this one is a fairly difficult task to accomplish. To understand how complicated a design it is, the 68K was in direct competition with the prevailing Intel microprocessors (x86) in the past. PCs used x86 while Macs used 68K. Like the x86, it sported a CISC architecture, which is the reason for it's complexity. In fact, the 68K was technically superior to the x86. However, as we all know, it's marketing that matters and Intel won in that department. Furthermore, trying to figure out the workings of the processor without ever having used one before is difficult enough without having to sort through the minor differences between the many variants.

So, for the last two years or so, I've been toying with the design on-and-off. Recently, I've gotten a bout of inspiration and have mostly completed the design on paper. The next step would obviously be to actually implement the design and test it. The design that I ultimately came up with is a hybrid. Although it is instruction set compatible to the 68000, it is full 32-bit (ala 68020) and has a six-stage instruction pipeline (ala 68040). Also, most of the instructions should execute in a single clock cycle. This will hopefully bring a 24X increase in performance over the original 68K. The trade-off is that it will be a big processor, which sort of negates my preference for simple and clean designs. Once implemented and tested, I will try to optimise the design at a later date.

As for the users of this processor, there are already people waiting for me to finish it up. Like I've blogged previously here, I've actually been in contact with some of them regarding using this chip. They have been working on the board and software while waiting for me to finish up the chip design. Hopefully, this will be useful to them when it's finished. I'd be curious to see how well it works in the wild.

UPDATE@1550: Video of Steve Jobs launching the (then) new Apple Macs, which run on the 68000. Quote: "It eats 8088s for breakfast!". This is of course, in 1984, when I was barely even out of diapers. Extremely cheesy product launch!!