I have an example of an experiment that I am marking at the moment. The experiment asks that the student design a new circuit based on the results of the experiment. They are told to design a circuit to be optimal, based on certain criteria. Those who designed it following methodology will give me an answer that is sub-optimal. Only those who designed it with instinct will possibly end up with the optimal answer. This year, only one student has been able to get it done so far and I had given him the highest marks to date.
The example that I had given above is sometimes quite abstract for people to understand. So, I've decided to illustrate that engineering is an art by using the example of my field, chip design. The attached graphic illustrates the placement and routing of signals on a chip. As you can see, it's literally an art. The whole process, from design entry up to tapeout, involves a lot of drawing.
The computer officer at my lab had recently installed and setup the Cadence suite of tools for me to use. Having used both Synopsys and Mentor ones before this, I can say that the Cadence ones seem to be comparatively easier to get into. However, this might be tempered by the fact that I'm already familiar with the usage of these tools after using the ones from the other vendors before.
In order to ensure that the tools had been installed and setup correctly, I brought a very simple design through the whole design process. So far, I've verified that most of it is working correctly. I only got to this stage after spending a few days setting up my environment variables and familiarising myself with the supplied technology and vendor libraries.
Although I may not be doing any tapeout, I would still like to bring my design through the motions in order to detect any design flaws. It would also be interesting to collect some implementation data in order to prove that my design works. Now, if I only had my design done. Hehe.