One problem with designing microprocessors is writing good testbenches. In the past, I had mainly written test software to test the functionality of each individual instruction. But, this suffers the weakness of not being able to test the functionality of a sequence of instructions. The individual test isn't capable of testing how instructions affect each other. I had not written a better test bench previously, as I hadn't figured out a suitable algorithm to write.
When cloning a microprocessor from scratch, I try to design a machine that is similar to the abstract model of the microprocessor. Software compilers also work with this abstract model and covert high level code into a sequence of low level instructions, based on it. I have to do this as I do not have access to intimate details of the microprocessor hardware. I would typically base my designs entirely on the programmers reference manual for that microprocessor.
So, if the software model and my hardware design are capable of executing the same code and produce the same results, it shows that the processor is working sufficiently well. With the fibonnaci code sequence, it tests a lot of aspects of the microprocessor. It tests basic arithmetic, logic, branch, loop, recursion, stacks, data movement and many other aspects of a microprocessor. It does this all in an elegant and short bit of code as well.
For the ae18, I was further able to verify the functionality by comparing the simulation results against the GPSIM simulator. This is a software simulator for the PIC chips. This further strengthens the case that the ae18 is working correctly. However, I can never be 100% sure that it's correct as there might still be some minor bug lurking somewhere.