More supervision questions

huhu... more questions.. as most of my students had no problems with the
previous set, i've upped the level a little.. to hopefully make them think a
bit..

** MEMORY HIERARCHY **

Q1) Which type of memory technology (SRAM, DRAM, SDRAM, etc) might be useful
for building L1, L2 and L3 caches? Why?

Q2) Without using more than a single block of direct-mapped cache, describe
how you would modify it to have the benefits of a 2-way associative cache?

Q3) If you had to design a cache system for an audio processor, how many
levels would there be and what sizes would they be? What factors would you
consider in your design?

Q4) What kind of problems exist when using cache memory with memory mapped I/O
devices? How can this be solved?

** VIRTUAL MEMORY **

Q5) What kind of applications require the use of a virtual memory sub-system?
Is it even necessary?

Q6) What kind of problems exist by using virtual memory with memory-mapped
I/O?

** I/O DEVICES **

Q7) Trace the cycle of I/O changes, as it increased in bandwidth, from
serial-parallel-serial-parallel. Why were the changes even made? Has everyone
gone mad?

Q8) What are the advantages of asynchronous I/O over synchronous I/O? Why?

Q9) Name a few common bus standards used for communication between processor +
I/O device. Identify the advantages of the different protocols and the kind
of tasks each is suited to.

** PARALLEL PROCESSING **

Q10) Is parallel processing scalable? How? Why?